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Alex Rivera
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I am trying to define variables in a Makefile, according to conditions. As ifeq can be run only in rules, I have added an additional rule (def_rule) I refer to for each rule. Example: def_rule: ifeq ($(TARGET), android) CC=arm-linux-androideabi-gcc else echo "native build" endf all: def_rule tp xi_eid_chipset.o Unfortunately, invoking make all returns this: ifeq (linux, android) /bin/sh: Syntax error: word unexpected (expecting ")") make: *** [def_rule] Error 2 I cannot figure out why. I have just followed examples in GNU Make documentation. Do you know how to do conditional defines in Makefiles ?
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