Questions tagged [x86] - KnowledgeHub

10

votes

3

answers

Why can't one instruction include two memory references in assembly?

assembly x86

asked 2013-07-07T17:36:45.980

12

votes

1

answers

What does the ".align" directive mean in x86-64 Assembly?

assembly x86 x86-64 cpu-architecture

asked 2013-06-25T19:15:33.730

14

votes

2

answers

Why are CISC processors harder to pipeline? In what sense are some instructions "more complex" than others?

x86 cpu-architecture instruction-set pipelining

asked 2013-06-25T02:51:38.027

9

votes

2

answers

How do I know if I can compile with FMA instruction sets?

linux x86 intel processor fma

asked 2013-05-02T22:39:32.007

16

votes

2

answers

CPU cache behaviour/policy for file-backed memory mappings?

c++ x86 operating-system cpu-architecture cpu-cache

asked 2013-04-06T16:53:23.873

8

votes

1

answers

Floating Point Exception when dividing in x86 nasm

linux assembly x86 nasm

asked 2013-03-24T18:45:29.087

65

votes

7

answers

How do AX, AH, AL map onto EAX?

assembly x86 cpu-registers

asked 2013-03-03T21:33:38.210

12

votes

2

answers

Triple fault on stack in C code

gcc assembly x86 stack osdev

asked 2013-02-10T10:07:25.007

266

votes

5

answers

How does the ARM architecture differ from x86?

x86 arm cpu-architecture

asked 2013-02-10T03:39:59.850

11

votes

2

answers

How is machine code stored in the EXE file?

x86 portable-executable machine-code instruction-set opcode

asked 2013-01-31T16:45:44.227

8

votes

1

answers

How to store lower or higher values from AVX/AVX2(YMM) register to memory like the SSE movlps/movhps does?

x86 sse simd avx avx2

asked 2013-01-30T08:23:14.873

12

votes

2

answers

What values can the carry flag hold, and how to check its status in x86 assembly?

assembly x86 nasm

asked 2013-01-29T02:28:50.433

8

votes

3

answers

How to receive L1, L2 & L3 cache size using CPUID instruction in x86

caching x86 intel cpu-cache cpuid

asked 2013-01-11T17:10:32.873

10

votes

1

answers

KVM shadow page table handling in x86 platform

linux linux-kernel x86 virtualization kvm

asked 2013-01-05T22:06:26.757

13

votes

5

answers

calling assembly function from c

c linux assembly gcc x86

asked 2012-12-16T12:24:20.437

9

votes

1

answers

Why Enable/Disable A20 Line

memory x86 operating-system bios osdev

asked 2012-12-15T14:28:03.117

8

votes

1

answers

Intel pin: Instrumentate running process

c++ x86 intel instrumentation intel-pin

asked 2012-12-13T19:17:45.043

63

votes

5

answers

How to get the CPU cycle count in x86_64 from C++?

c++ c performance x86 rdtsc

asked 2012-12-07T23:18:41.437

12

votes

1

answers

Return stack buffer?

x86 cpu cpu-architecture branch-prediction micro-architecture

asked 2012-12-05T12:08:28.847

13

votes

2

answers

How can I ask Mac OS to allocate memory in a specific address range?

macos memory-management x86 emulation powerpc

asked 2012-11-22T17:13:11.137

10

votes

3

answers

Relation between bytecode instructions and processor operations

java x86 bytecode processor atomic

asked 2012-11-15T16:04:53.903

19

votes

2

answers

Is ADD 1 really faster than INC ? x86

performance optimization assembly x86

asked 2012-11-14T16:53:40.910

9

votes

2

answers

What is the meaning of the terms 'amd64' 'x64' and 'x86'?

x86 64-bit x86-64

asked 2012-11-11T18:49:18.263

13

votes

2

answers

Do FP operations give EXACTLY the same result on various x86 CPUs?

x86 floating-accuracy

asked 2012-10-27T16:53:14.970

51

votes

2

answers

Is x86 RISC or CISC?

x86 cpu cpu-architecture

asked 2012-10-25T14:48:11.940

40

votes

1

answers

Does omitting the frame pointers really have a positive effect on performance and a negative effect on debug-ability?

performance visual-studio-2010 visual-c++ x86 stack-frame

asked 2012-10-22T07:00:08.053

29

votes

2

answers

Cost of push vs. mov (stack vs. near memory), and the overhead of function calls

c assembly x86 stack processing-efficiency

asked 2012-10-07T06:08:53.590

44

votes

3

answers

Why is such complex code emitted for dividing a signed integer by a power of two?

c++ assembly visual-c++ x86 integer-division

asked 2012-10-02T14:20:25.603

11

votes

2

answers

meaning of R_386_32/R_386_PC32 in .rel.text section of elf

c linux assembly x86

asked 2012-09-13T17:57:00.903

14

votes

1

answers

Reliable information about x86 string instruction performance?

performance optimization assembly x86

asked 2012-09-10T20:48:20.380

8

votes

2

answers

How many assembly languages are there

assembly x86

asked 2012-09-07T20:22:48.057

9

votes

1

answers

Atomic Minimum on x86 using OpenMP

c++ x86 openmp atomic minimum

asked 2012-09-04T00:05:14.373

41

votes

1

answers

How to build i686-linux-android-gfortran for android-ndk8b (x86 arch Android)?

android gcc x86 fortran

asked 2012-08-16T07:39:34.477

11

votes

2

answers

c generate function and call it

c x86 runtime code-generation

asked 2012-07-31T11:39:42.360

57

votes

6

answers

Why is the page size of Linux (x86) 4 KB, how is that calculated?

linux x86 cpu-architecture paging virtual-memory

asked 2012-07-18T14:30:28.543

8

votes

4

answers

How to calculate MIPS of my processor?

performance architecture x86 preprocessor performance-testing

asked 2012-07-09T10:30:15.893

12

votes

2

answers

Is it okay to mix legacy SSE encoded instructions and VEX encoded ones in the same code path?

assembly x86 sse avx

asked 2012-06-02T21:21:41.913

15

votes

2

answers

Assembly Segments in opcodes

assembly x86 masm addressing-mode memory-segmentation

asked 2012-05-30T16:59:13.200

13

votes

1

answers

(Writing kernel) How do I modify the interrupt descriptor table?

x86 kernel interrupt-handling osdev context-switch

asked 2012-04-29T03:49:34.733

20

votes

3

answers

How to use a logical address with an FS or GS base in gdb?

gdb x86 memory-segmentation

asked 2012-04-27T16:06:35.633

9

votes

3

answers

Efficient complex arithmetic in x86 assembly for a Mandelbrot loop

c assembly x86 sse complex-numbers

asked 2012-04-26T08:39:20.163

37

votes

4

answers

Cycles/cost for L1 Cache hit vs. Register on x86?

performance x86 cpu-architecture cpu-cache micro-optimization

asked 2012-04-23T03:08:11.003

189

votes

3

answers

Why does GCC generate such radically different assembly for nearly the same C code?

c gcc assembly x86 compiler-optimization

asked 2012-04-20T16:59:24.940

32

votes

5

answers

Modern x86 cost model

performance assembly x86 floating-point micro-optimization

asked 2012-03-31T15:01:55.043

18

votes

3

answers

How to dump all the XMM registers in gdb?

x86 gdb simd sse cpu-registers

asked 2012-03-30T19:52:43.650

12

votes

1

answers

Getting floating point exception while trying to use div in assembly

assembly x86

asked 2012-03-20T18:49:14.467

23

votes

3

answers

Fastest way to do horizontal vector sum with AVX instructions

x86 sse simd avx vector-processing

asked 2012-03-19T18:11:59.497

14

votes

2

answers

What is argument push order

assembly x86 arguments calling-convention stack-memory

asked 2012-02-04T14:31:40.213

11

votes

4

answers

Efficiently dividing a double by a power of 2

c++ c x86

asked 2012-01-19T13:21:12.903

27

votes

6

answers

Why are complicated memcpy/memset superior?

c optimization assembly x86 64-bit

asked 2012-01-13T23:45:22.357

Questions tagged x86